ARM Technical Symposium, December 13, 2012— Altera Corporation (NASDAQ: ALTR) and ARM (LSE: ARM; NASDAQ: ARMH) today announced that, under a unique agreement, the companies have jointly developed a DS-5 embedded software development toolkit with FPGA-adaptive debug capabilities for Altera SoC devices.  The ARM® Development Studio 5 (DS-5™) Altera Edition toolkit is designed to remove the debugging barrier between the  integrated dual-core CPU subsystem and  FPGA fabric in Altera SoC devices.  By combining the most advanced multi-core debugger for the ARM architecture with the ability to adapt to the logic contained in the FPGA , the new toolkit provides embedded software developers an unprecedented level of full-chip visibility and control through the standard DS-5 user interface.  The new toolkit will be included in the Altera SoC Embedded Development Suite and will begin shipping in early 2013.

Altera SoC devices combine a dual-core ARM Cortex™-A9 processor with FPGA logic on a single device, giving users the power and flexibility to create custom field-programmable SoC variants by implementing user-defined peripherals and hardware accelerators in the FPGA fabric. Altera is currently shipping engineering samples of its Cyclone V SoC devices.  Please  see  Altera’s press release “Altera Shipping Cyclone V SoC FPGAs” announced today at http://newsroom.altera.com/ .

The ARM Development Studio 5 (DS-5) Altera Edition embedded software development toolkit dynamically adapts to the unique customer configuration of the FPGA within the SoC to seamlessly extend embedded debugging capabilities across the CPU-FPGA boundary and unify all software debugging information from the CPU and FPGA domains with the standard DS-5 user interface.  When combined with the advanced multi-core debugging capability of the DS-5 Debugger, and the link to the Quartus II SignalTap logic analyzer for cross-triggering capability, the toolkit delivers an unprecedented level of debugging visibility and control that leads to substantial productivity gains.

“Leading-edge silicon devices demand leading-edge software tools.  That demand has been met by this toolkit for Altera 28nm Cyclone V and Arria V SoC devices and for upcoming Altera 20nm SoC devices,” said John Cornish, executive vice president, system design division, ARM. “This development has unified CPU debugging with FPGA debugging to bolster user productivity. Altera and ARM have made this advanced tool technology with premium, productivity-boosting features widely available through the Altera SoC development kits and the Altera SoC Embedded Development Suite. We believe this combination will deliver valuable benefits to our mutual customers.” said John Cornish, executive vice president, system design division, ARM.

The ARM DS-5 toolkit suite offers the most advanced multi-core debugger in the market for the ARM architecture.  It supports debugging on systems running in asymmetric multiprocessing (AMP) and symmetric multiprocessing (SMP) system configurations. It is broadly used for board bring-up, driver development, OS porting, bare-metal and Linux application development, through JTAG and Ethernet debugging interfaces, and offers Linux and RTOS awareness.

 “We are very proud of the partnership and innovation in this joint work with ARM,” said Vince Hu, vice president of product and corporate marketing at Altera. “The ARM  DS-5 Altera Edition toolkit gives software engineers an incredibly powerful development and debugging tool, allowing for the fastest development time for our SoC devices.” 

Key Features and Benefits:  Innovations in the SoC hardware design, DS-5 tools and Quartus-II software combine to deliver FPGA adaptive unified debugging for Altera SoC devices, giving users an unmatched level of visibility and controllability to the whole system.  The ARM DS-5 Altera Edition toolkit features the following capabilities:

• Software debug view adapts to include the peripheral devices programmed by the developer into the  FPGA fabric, providing a seamless  view of both the hard and soft  peripheral register memory map of the entire  SoC
• The DS-5 Debugger simultaneously displays debug/  trace data for the Cortex™-A9 processor cores and  CoreSight™ -compliant custom logic cores  implemented in  the FPGA fabric
• Altera USB Blaster JTAG debug cable supports both the DS-5 debugger and other Altera JTAG-based tools for  the Altera SoC device
• Allows non-intrusive capture and visualization of signal events in the FPGA fabric that can be, time correlated with software events and processor instruction trace
• Includes the DS-5 Streamline performance analyzer, which correlates software thread and event information with hardware counters from both the SoC and FPGA, enabling the identification and correction of system-level bottlenecks.

Pricing and Availability The ARM DS-5 Altera Edition toolkit for Altera SoCs is being presented at the ARM Technical Symposium in Paris on December 13, 2012. This toolkit will be included in the Altera SoC Embedded Development Suite (Altera SoC EDS) Subscription Edition for $995. The Altera SoC EDS will start shipping in early 2013.